Digital Logic Fundamentals Unit 9 – Data Bus Control
The CPU outputs information on the address bus. A decoder interprets the address and sends a
chip select (CS) control signal to the device with which the CPU desires to communicate.
A high chip select (CS) control signal enables the device for a read or write operation from the
CPU. CS and R/W signals control the flow of data, on the bidirectional data bus, between the
CPU and the memory or I/O devices.
AND gates, tri-state buffers, and an inverter (NOT gate) are used in the digital logic circuitry that
controls read and write operations.
In previous units, you demonstrated the operation of
- an inverter,
- an AND gate, and
- a tri-state buffer.