Digital Logic Fundamentals Unit 9 – Data Bus Control
Exercise 2 – Dynamic Control of a Data Bus
EXERCISE OBJECTIVE
When you have completed this exercise, you will be able to demonstrate control of dynamic
bidirectional data transfer by using the DATA BUS CONTROL circuit block. You will verify
our results by observing the transfer of clocked data with an oscilloscope.
EXERCISE DISCUSSION
- Computer data transfers occur dynamically.
- A CS control signal is initiated by the CPU through an address decoder.
• The CPU selects the direction of the transfer using the R/W signal.
- Devices that are not selected remain in the high-Z state.
- The CPU waits for the data to become stable.
- The data transfer usually occurs on the falling edge of the CS signal.