Handbook for Sound Engineers

Delay 813

24.5 Analog-to-Digital Conversion

Details for the large number of analog-to-digital conver-

sion methods are outside the scope of this chapter, but

the efficiency with which it is accomplished is so

important to the success and acceptability of a digital

delay or reverberation system that an overview of the

common conversion principles is useful.

24.5.1 Pulsed Code Modulation

Pulsed code modulation (PCM) uses a number to repre-
sent the value of each sample. The continuously varying
analog signal is divided up in time by sampling and
divided up in amplitude by quantization.
The quantization resolution is defined by the number
of bits used in the binary number and defines the ampli-
tude resolution of the signal. The number of possible
states for a number with n bits is 2n. For a 16-bit num-
ber, there are 2^16 or 65,536 different voltages that may
be represented. For a 1 V peak-to-peak signal, this is
equivalent to a 30μV resolution. An error in the repre-
sentation of the analog value results because there is a
range of voltages that yield the same output code. This
error is called the quantization noise and is given by

(24-7)

where,

Q is the smallest analog difference that can be resolved

by the converter,

A is the maximum amplitude,

n is the number of bits.

Another way of expressing this error is as the

dynamic range of the converter.

(24-8)

A 16-bit coding system will therefore have a dynamic
range of 6.02^16 =96dB.
The multibit binary word represents the amplitude of
samples at regular intervals, usually in twos complement
form. In this scheme the codes vary between 2n^1 and
2 n^1 1. The most significant bit (MSB) indicated the
sign, with all negative values having MSB = 1. The
code is often used in it fractional form, where the num-
bers represent values between 1 and 0.999.

24.5.2 Delta Modulation

Delta modulation is based on whether the newest sam-

ple in a sequence is less than or greater than the last. A

delta modulator produces a stream of single bits repre-

senting the error between the actual input signal and

that reconstructed by the demodulator.

A simple delta modulator, as shown in Fig. 24-18,

consists of three parts: a comparator whose output is

high or low depending on the relative levels of the input

signal (SST ) and the reconstructed signal y(t), a D-type

flip-flop that stores the comparator output under control

of a sampling clock, and a reference decoder that inte-

grates the binary output to reconstruct the signal y(t).

The demodulator is a simple integrator circuit with the

same characteristics as those used in the reference path

of the modulator. It will reconstruct the reference signal

yc(t), which is a close approximation of the original

input.

The simplicity of the coding and decoding schemes

has resulted in use of the delta modulator for communi-

cation and motor control applications. The simplest

integrating network consists of a resistor and a capaci-

tor, but the quantization noise from this is quite high so

more practical systems use double integration in the

reference path.

Distortion in delta modulation occurs if the rate of

change in the input signal is greater than the maximum

rate of change of the output of the integrator. The maxi-

mum rate at which a sinusoidal signal, AsinZt, varies is

Q A

2 n

---- -=

DR= 20 log 2 n

= 20 nlog 2

= 6.02n

Figure 24-18. A delta-modulator system.

Analog

input

X(t)

Comparator D-typeflip flop

Binary

output

X(t)

X(t)

Y(t)

9(t)

R Clock

C

A. Coder.

Binary

input

L’(t)

Y’(t)

Recovered

output

X’(t)

B. Decoder.

R

C