Reverse Engineering for Beginners
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT Chapter 24 64-bit values in 32-b ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT 24.1.3 MIPS. A 64-bit value is r ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT push OFFSET $SG1436 ; '%I64d', 0 ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT f_sub PROC SUBS r0,r0,r2 SBC r1, ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT sltu $a1, $v1 jr $ra ; subtract ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT _f_mul PROC push ebp mov ebp, es ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT ret _f_div: sub esp, 28 mov eax, ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT POP {r4,pc} ENDP ||f_div|| PROC ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT jalr $t9 or $at, $zero lw $ra, 0 ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT ORRS r0,r0,r2 LSRS r1,r1,#7 BX l ...
CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT CHAPTER 24. 64-BIT VALUES IN 32-BIT ENVIRONMENT 24.5.3 MIPS. GCC for MIPS does t ...
CHAPTER 25. SIMD CHAPTER 25. SIMD Chapter 25 SIMD SIMDis an acronym:Single Instruction, Multiple Data. As its name implies, it p ...
CHAPTER 25. SIMD CHAPTER 25. SIMD for (i = 0; i < 1024; i++) { C[i] = A[i]*B[i]; } This fragment of code takes elements from ...
CHAPTER 25. SIMD CHAPTER 25. SIMD mov esi, [esp+10h+ar2] sub esi, eax lea ecx, ds:0[edx*4] cmp esi, ecx jb loc_143 loc_55: ; COD ...
CHAPTER 25. SIMD CHAPTER 25. SIMD movdqu xmm0, xmmword ptr [esi+edi*4] ; ar2+i*4 is not 16-byte aligned, so load it to XMM0 padd ...
CHAPTER 25. SIMD CHAPTER 25. SIMD exception is raised in case of overflow and no flags are to be set, just the low 32 bits of th ...
CHAPTER 25. SIMD CHAPTER 25. SIMD mov edx, [edi+eax*4] add edx, [esi+eax*4] mov [ebx+eax*4], edx add eax, 1 cmp eax, ecx jnz sho ...
CHAPTER 25. SIMD CHAPTER 25. SIMD add eax, 1 add edi, 4 add edx, [esi] add esi, 4 mov [ebx], edx add ebx, 4 cmp ecx, eax jg shor ...
CHAPTER 25. SIMD CHAPTER 25. SIMD mov BYTE PTR [rdi], al je .L15 movzx eax, BYTE PTR [rsi+1] cmp rcx, 2 mov BYTE PTR [rdi+1], al ...
CHAPTER 25. SIMD CHAPTER 25. SIMD xor r9d, r9d add rcx, rdi xor ebx, ebx .L7: movdqa xmm0, XMMWORD PTR [rbp+0+r9] add rbx, 1 mov ...
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