VHDL Programming

Data Types 87

elements of different types. Arrays are useful for modeling linear struc-

tures such as RAMs and ROMs, while records are useful for modeling

data packets, instructions, and so on.

Composite types are another tool in the VHDL toolbox that allow very

abstract modeling of hardware. For instance, a single array type can repre-

sent the storage required for a ROM.

ARRAY TYPES Array types group one or more elements of the same type

together as a single object. Each element of the array can be accessed by one

or more array indices. Elements can be of any VHDL type. For instance,

an array can contain an array or a record as one of its elements.

In an array, all elements are of the same type. The following example

shows a type declaration for a single dimensional array of bits:

TYPE data_bus IS ARRAY(0 TO 31) OF BIT;

This declaration declares a data type called data_busthat is an array of

32 bits. Each element of the array is the same as the next. Each element

of the array can be accessed by an array index. Following is an example

of how to access elements of the array:

VARIABLE X: data_bus;

VARIABLE Y: BIT;

Y := X(0); --line 1

Y := X(15); --line 2

This example represents a small VHDL code fragment, not a complete

model. In line 1, the first element of array Xis being accessed and assigned

to variable Y, which is of bit type. The type of Ymust match the base type

of array Xfor the assignment to take place. If the types do not match, the

compiler generates an error.

In line 2, the sixteenth element of array Xis being assigned to variable

Y. Line 2 is accessing the sixteenth element of array Xbecause the array

index starts with 0. Element 0 is the first element, element 1 is the second,

and so on.

Following is another more comprehensive example of array accessing:

PACKAGE array_example IS

TYPE data_bus IS ARRAY(0 TO 31) OF BIT;

TYPE small_bus IS ARRAY(0 TO 7) OF BIT;

END array_example;