VHDL Programming

(C. Jardin) #1

PREFACE


This is the fourth version of the book and this version now not only provides


VHDL language coverage but design methodology information as well. This


version will guide the reader through the process of creating a VHDL


design, simulating the design, synthesizing the design, placing and routing


the design, using VITAL simulation to verify the final result, and a new


technique called At-Speed debugging that provides extremely fast design


verification. The design example in this version has been updated to reflect


the new focus on the design methodology.


This book was written to help hardware design engineers learn how to

write good VHDL design descriptions. The goal is to provide enough VHDL


and design methodology information to enable a designer to quickly write


good VHDL designs and be able to verify the results. It will also attempt


to bring the designer with little or no knowledge of VHDL, to the level of


writing complex VHDL descriptions. It is not intended to show every pos-


sible construct of VHDL in every possible use, but rather to show the de-


signer how to write concise, efficient, and correct VHDL descriptions of


hardware designs.


This book is organized into three logical sections. The first section of the

book will introduce the VHDL language, the second section walks through


a VHDL based design process including simulation, synthesis, place and


route, and VITAL simulation; and the third section walks through a design


example of a small CPU design from VHDL capture to final gate-level


implementation, and At-Speed debugging. At the back of the book are


included a number of appendices that contain useful information about the


language and examples used throughout the book.


In the first section VHDL features are introduced one or more at a time.

As each feature is introduced, one or more real examples are given to show


how the feature would be used. The first section consists of Chapters 1


through 8, and each chapter introduces a basic description capability of


VHDL. Chapter 1 discusses how VHDL design relates to schematic based


design, and introduces the basic terms of the language. Chapter 2 describes


some of the basic concepts of VHDL, including the different delay mecha-


nisms available, how to use instance specific data, and defines VHDL dri-


vers. Chapter 2 discusses concurrent statements while Chapter 3 introduces


the reader to VHDL sequential statements. Chapter 4 talks about the wide

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