Advanced Topics 217
PACKAGE p_qual_2 IS
TYPE vector8 IS ARRAY( 0 TO 7) OF BIT;
END p_qual_2;USE WORK.p_qual_2.ALL;
ENTITY latch IS
PORT( reset, clock : IN BIT;
PORT( data_in : IN vector8;
PORT( data_out : OUT vector8);
END latch;ARCHITECTURE behave OF latch IS
BEGIN
PROCESS(clock)
BEGIN
IF (clock = ‘ 1 ’) THEN
IF (reset = ‘ 1 ’) THEN
data_out <= vector8’(others => ‘ 0 ’);
ELSE
data_out <= data_in;
END IF;
END IF;
END PROCESS;
END behave;This example is an 8-bit transparent latch, with a resetline to set the
latchto zero. When the clock input is a ‘ 1 ’value, the latchis trans-
parent, and input values are reflected on the output. When the clock input
is ‘ 0 ’, the data_invalue is latched. When resetis a ‘ 1 ’value while clock
input is a ‘ 1 ’, the latchis reset. This is accomplished by assigning all
‘ 0 ’s to data_out. One method to assign all ‘ 0 ’s to data_outis to use an
aggregate assignment. Because data_outis 8 bits, the following aggregate
assignment sets data_outto all ‘ 0 ’s:data_out <= (‘ 0 ’, ‘ 0 ’, ‘ 0 ’, ‘ 0 ’, ‘ 0 ’, ‘ 0 ’, ‘ 0 ’, ‘ 0 ’);This aggregate works fine unless the type of data_outchanges. If the
type of output data_outwas suddenly changed to 16 bits instead of 8, the
aggregate could no longer be used.
Another method to accomplish the assignment to output data_outis to
use a qualified expression. The assignment to data_outwhen reset = ‘ 1 ’
in the preceding example shows how this might be done. The following ex-
pression:(others => ‘ 0 ’)can be qualified with the type of the target signal (data_out). This allows
the compiler to determine how large the target signal is and how large to