VHDL Programming

292 Chapter Twelve

ALU—These instructions perform arithmetic and logical opera-

tions such as ADD, SUBTRACT, OR, AND, and NOT.

Shift—These instructions use the shift unit to perform shift

operations on the data passed to it.

Sample Instruction Representation

Instructions share common attributes, but come in a number of flavors.

Sample instructions are shown in Figure 12-2.

All instructions contain the opcode in the five most significant bits of

the instruction. Single-word instructions also contain two 3-bit register

fields in the lowest 6 bits of the instruction. Some instructions, such as

INC (Increment), only use one of the fields, but other instructions, such

as MOV (Move), use both register fields to specify the From register and the

To register. In double-word instructions, the first word contains the opcode

and destination register address, and the second word contains the im-

mediate instruction location or data value to be loaded. For instance, a

LoadI (Load Immediate) instruction would look like this:

LoadI 1, 16#15

Opcode

SRC DST

15 14 13 12 11 5 4 3 2 1 0

Single Word

Opcode

DST

15 14 13 12 11 2 1 0

15 14 13 12 11 5 4 3 2 1 0

Address or Data

Double Word

Figure 12-2
Instruction Words.