VHDL Programming

(C. Jardin) #1

348 Chapter Fourteen


The advantages of the fast testbench are that it executes extremelyfast
and doesn’t suffer from the operating system file overhead of reading afile.
A disadvantage is that the compiled model can get very large if the
number of vectors is large, making compile time long and simulator
memory usage excessive. Another disadvantage of the fast testbench is
that the model is not easily changed between simulation runs. Changing
the testbench requires a recompilation step. Therefore, the fast testbench
is most useful for models that need fast vector application and the vectors
can be run in a small- or medium-sized loop where the vectors are applied
again and again.
The advantages and disadvantages of each kind of testbench type are
shown in Figure 14-3.
Notice that the stimulus only and full testbenches use TextIO. This can
limit their speed if the DUT requires a lot of vector input. However, the
advantages of using TextIO is the ease of changing the input data. No re-
compilation step is required to change the stimulus data. All that is re-
quired to make a change to the input stimulus is to change the input file
and restart the simulation.
The simulator-specific testbench is also very easy to change because
it is typically an interpreted command language. Interpreted command
languages don’t need a separate compile step. Updating the command lan-
guage file and reloading it in the simulator is all that is required to make
a change. The price of this flexibility, however, may be slow execution
speed. An interpreted command language doesn’t need to be compiled, but
may not execute fast depending on how many vectors are needed how
quickly. A design that needs a lot of vectors very quickly may be limited
by the speed of the interpreter.
The fast testbench really excels at going fast, but is much more dif-
ficult to change quickly than some of the other testbench types. To make
a change, the vectors must be updated and the testbench recompiled. If
the vector file is large, this process can take an excessive amount of time.
Now that we have discussed testbenches, let’s use one to simulate the
CPU for correctness.

Speed Flexibility Portability
Stimulus Only Slow High High
Full Slow High High
Simulator Specific Medium High Low
Hybrid Medium Medium High
Fast Extremely Fast Low High

Figure 14-3
Testbench
Advantages and
Disadvantages.

Free download pdf