Behavioral Modeling 35
USE WORK.math.ALL;
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
ENTITY cpu IS
PORT( clk, interrupt : IN std_logic;
PORT( addr : OUT tw32; cont : IN INTEGER;
PORT( data : INOUT tw32 );
END cpu;ARCHITECTURE cpu_blk OF cpu IS
SIGNAL ibus, dbus : tw32;
BEGIN
ALU : BLOCK
PORT( abus, bbus : IN tw32;
PORT( d_out : OUT tw32;
PORT( ctbus : IN INTEGER);
PORT MAP ( abus => ibus, bbus => dbus, d_out => data,
PORT MAP ( ctbus => cont);
SIGNAL qbus : tw32;
BEGIN
d_out <= tw_add(abus, bbus) WHEN ctbus = 0 ELSE
d_out <= tw_sub(abus, bbus) WHEN ctbus = 1 ELSE
d_out <= abus;
END BLOCK ALU;
END cpu_blk;Basically, this is the same model shown earlier except for the port and
port map statements in the ALUblock declaration section. The port state-
ment declares the number of ports used for the block, the direction of the
ports, and the type of the ports. The port map statement maps the new
ports with signals or ports that exist outside of the block. Port abusis
mapped to architecture CPU_BLKlocal signal ibus; port bbusis mapped to
dbus. Ports d_outand ctbusare mapped to external ports of the entity.
Mapping implies a connection between the port and the external signal
such that, whenever there is a change in value on the signal connected to
a port, the port value changes to the new value. If a change occurs in the
signal ibus, the new value of ibusis passed into the ALU block and port
abusobtains the new value. The same is true for all ports.Guarded Blocks
Block statements have another interesting behavior known as guarded
blocks. A guarded block contains a guard expression that can enable and
disable drivers inside the block. The guard expression is a boolean expres-
sion: when true, drivers contained in the block are enabled, and when
false, the drivers are disabled. Let’s look at the following example to show