0195136047.pdf

332 DIGITAL BUILDING BLOCKS AND COMPUTER SYSTEMS

C′o,Ci,C′′o, andSfor each pair of bits.
*6.1.40Show that the circuit of Figure P6.1.40 is a NOR-
gate realization of a flip-flop.
6.1.41Consider a 1-bit version of thedigital comparator
shown in Figure P6.1.41. Note that the operation
of this circuit is such that whichever output is 1
gives the desired magnitude comparison.
(a) Using NAND and INVERTER gates only, de-
termine the number of gates required.
(b) Using NOR and INVERTER gates only, de-
termine the number of gates required.
(c) Which realization requires the least number
of gates?
6.1.42Draw the logic diagram of anSRlatch using only
NAND gates, and obtain the truth table for that
implementation.
6.1.43Complete the timing diagram of Figure P6.1.43 of
anSRlatch.
6.1.44You are to construct a modified truth table for
the circuit realization of the SRFF shown in Fig-
ure 6.1.18. As indicated in the text, you guess
an output and then go back to check it for self-
consistency. In order to get you started, a part of
the table is given:

S R Q (guess) Q (guess) Q ̄ Q ̄

(a) 0 0 1 0

(b) 0 0 0 1

(c) 1 0 0 1

(d) 1 0 1 0

(e) 0 1 0 1

(f) 1 1 1 1

For each row in the table, determineQandQ ̄, and

comment on the result.

*6.1.45Let the circuit of Figure 6.1.18 be given the inputs

shown in Figure P6.1.45, with the initial value of

Qbeing 1. Find thetiming diagram(i.e.,Qas a

function of time).

6.1.46Consider the case of a positive-edge triggered D

flip-flop with preset and clear, as shown in Figure

6.1.22 of the text. With the input signals shown in

Figure P6.1.46, find the timing diagram (i.e., plot

QandQ ̄as a function of time).

6.1.47(a) Draw the logic diagram of the enabledDlatch

using only NAND gates.

(b) Complete the timing diagram of Figure

P6.1.47(a) of theDlatch whose block diagram

and truth table are given in Figure P6.1.47(b).

S

S′

A S

Half-adder

B Full-adder

A

B

Ci

Ci

Co

Co

Co′

Co′′

Half-adder

Figure P6.1.39

A

B

Y

Y

Figure P6.1.40

B

A

A B A B A B A B

AB

AB = D

AB = C

(AB + AB) = E

(A < B)

(A = B)

(A > B)

AB

A

Figure P6.1.41