0195136047.pdf

PROBLEMS 333

S

R

Figure P6.1.43

S

0

1

R

0

1

Figure P6.1.45

Ck

Clear

Preset

D

Figure P6.1.46

D

E

D

D

E

E

Q

Q

(b)

(a)

Inputs Outputs

Qn Qn

QQ

0

110

1 1 0

d

ED

0

1

Figure P6.1.47

6.1.48A JK flip-flop is shown in Figure P6.1.48(a).
(a) Modify it to operate like the D flip-flop of
Figure P6.1.48(b).
(b) Modify the JK flip-flop to operate like the T
flip-flop of Figure P6.1.48(c).
6.1.49When theJand K inputs of a JKFF are tied to
logic 1, this device is known as a divide-by-2
counter. Complete the timing diagram shown in
Figure P6.1.49 for this counter.
*6.1.50An interesting application of the SRFF is as a
bufferin overcomingcontact bouncein mechan-
ical switches. These switches, of thetoggletype,
may be used to change the logic state in a circuit.

However, they suffer from a major problem in

that their contacts do not close immediately but

continue to make and break for some time after. To

avoid such an undesirable state (because it causes

the logic state of the circuit to fluctuate), an SRFF

is placed between the switch and the circuit, as

shown in Figure P6.1.50. Explain the operation

as a buffer.

6.1.51Jand K are the external inputs to the JKFF shown

in Figure P6.1.51. Note that gates 1 and 2 are

enabled only when the clock pulse is high. Con-

sider the four cases of operation and explain what

happens.