338 DIGITAL BUILDING BLOCKS AND COMPUTER SYSTEMSanalog output voltage as a fraction of the reference
voltage.*6.2.37Consider the 4-bitR–2Rladder D/A converter
withVref=−10 V. Determine the analog output
voltage when the binary input code is 1100. Also,
find what reference voltage is to be used in order to
obtain the corresponding decimal output voltage.
6.2.38For a 10-bitR–2Rladder-network D/A converter
with an MSB resistor value of 10 k, what is the
value of the LSB resistor?
6.2.39What is the basic difference between the weighted-
resistor and theR–2Rladder D/A converters?
6.2.40(a) Design a 6-bitR–2Rladder D/A converter.
(b) ForVref=10 V, find the maximum output
voltage.
(c) Determine the output voltage increment.
(d) If the output voltage is to indicate increments
of 0.1 V, find the bits that must be used.
6.2.41What is the basic difference between counter-
controlled and successive-approximation A/D
converters?
*6.2.42Consider the dual-slope A/D converter of Figure
6.2.15.
(a) Calculate the total charge on the integrator
due to the input voltageVinduring the signal
integration timeT.
(b) Obtain an expression for the discharge timetd
in terms ofVin,Vref, andT.
6.2.43An 8-bit A/D converter is driven by a 1-MHz
clock. Estimate the maximum conversion time if:
(a) It is a counter-controlled A/D converter.
(b) It is a successive-approximation A/D con-
verter.
6.2.44How many 500-page books can be stored on a
2400-ft, 1600-BPI magnetic tape if a typewritten
page contains about 2500 bytes?
6.2.45Suppose a ROM holds a total of 8192 bits.
(a) How many bits long would the individual ad-
dresses have to be?
(b) If the bits are organized into 8-bit memory
words or bytes, how many words would there
be, and how many bits long would the ad-
dresses have to be?
(c) How is such a ROM described?
(d) If each location requires its own word line
emanating from a decoder AND gate, how
many gates would the decoder for 1K-byte
ROM have to contain?
(e) Develop atwo-dimensional addressingsys-
tem using a 6-to-64 decoder, a 64-word×128-
bit matrix, and 16-input multiplexers. How
many gates would such a system require?
6.2.46Show the schematic arrangement for: (a) one-
dimensional addressing, and (b) two-dimensional
addressing (see Problem 6.2.45), if a 32-kbit ROM
is used to provide an 8-bit output word.
6.2.47Repeat Problem 6.2.46 if a 64-kbit ROM is to
provide a 16-bit output word.
*6.2.48Sketch a typical circuit for a 2-input, 4-output
decoder.
6.2.49Digital watches display time by turning on a cer-
tain combination of the seven-segment display
device.
(a) Show a typical seven-segment display.
(b) Develop a truth table for turning on the seg-
ments. The truth table should have inputsW,
X, Y,andZto represent the binary equiva-
lents of the decimal integers, and outputsS 0 ,
S 1 ,...,S 7.
(c) Develop a typical circuit for one segment,S 0.
(d) Show a schematic diagram of the seven-
segment decoder/driver block (available in IC
form).
6.2.50Develop a schematic diagram of a system in which
the D/A converter of Figure 6.2.13 can be em-
ployed in a digital voltmeter.