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9.3 CMOS AND OTHER LOGIC FAMILIES 435

7

vout, V

vin, V

6 5 4 3 2 1

02341

(a)

567

ID 1 , mA

vin, V

0.02

0.01

02341

(b)

567

Figure 9.3.4Typical characteristics of a CMOS

inverter.(a)Voltage-transfer characteristic.(b)

Drain current versus input voltage.

CMOS NAND and NOR gates with two inputs are shown in Figure 9.3.5. For the NAND
gate of Figure 9.3.5(a), if at least one input is in the low state, the associated PMOS device will
be on and the NMOS device will be off, thereby yielding a high output state. If, on the other
hand, bothVAandVBare high, both PMOS devices will be off while both NMOS devices will
be on, thereby giving a low outputVout. Thus, the CMOS device of Figure 9.3.5(a) functions as
a NAND gate.
For the NOR gate of Figure 9.3.5(b), when both inputsVAandVBare low, both NMOS
devices will be off with both PMOS devices on, and the outputVoutis high aroundVSS. If, on
the other hand, one of the inputs goes to be high, the associated PMOS device turns off and the
corresponding NMOS device turns on, thereby yielding an outputVoutto be low. Thus, the CMOS
device of Figure 9.3.5(b) functions as a NOR gate. Note that neither gate in Figure 9.3.5 draws
virtually any power-supply current, so that there is virtually no power consumption.
Another CMOS circuit that is conveniently built into CMOS technology is known as the
transmission gate, which is not strictly speaking a logic circuit. It is a switch controlled by a logic
input. In its circuit shown in Figure 9.3.6, the control signalCand its complementC ̄determine
whether or not the input is connected to the output. WhenCis low (andC ̄is high), neither gate
can induce a channel and the circuit acts as a high resistance between input and output. The
transmission gate is then effectively an open circuit. On the other hand, whenCis high (andC ̄
is low), the transmission gate provides a low-resistance path between input and output for all