0195136047.pdf

442 DIGITAL CIRCUITS

+VCC

RC

Vo

R

VA

R

VB

R

VC

T 1

T 2

T 3

Figure P9.2.8

+VCC

RB RC

Vo

DA

VC D

VB

VA

Figure P9.2.9DTL gate circuit.

9.3.3FET logic circuits can be used with positive

pulses by using enhancement-moden-channel

MOSFETs as switches. Figure P9.3.3(a) shows the

circuit and Figure P9.3.3(b) the MOSFET charac-

teristics. For the input shown in Figure P9.3.3(c),

sketch the output as a function of time.

*9.3.4The complementary-symmetry MOSFET (CMOS)
switch shown in Figure 9.3.2 has MOSFETs with
VT=5 V andVsat=1V.IfVSS=20 V andvinas
shown in Figure P9.3.4, sketch the output voltage
as a function of time.
9.3.5A typical CMOS inverter is shown in Figure

P9.3.5(a). Then-channel MOSFETT 1 has the

characteristics shown in Figure P9.3.5(b).T 2 has

identical characteristics except for the changes of

sign appropriate to ap-channel device.

(a) Outline a graphical procedure in order to find

the operating point of the CMOS inverter

by superposing theI–Vcharacteristics ofT 1

andT 2.

(b) Sketch the resulting voltage-transfer charac-

teristics (voutversusvin) and drain current ver-

sus input voltagevinfor the CMOS inverter.