Ports for Embedded Systems
Bit 0 (ADBDEN) is set to 1 to cause the chip to detect the bit rate on the next
received byte. The received byte must equal 55h for accurate detecting of the
rate.
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In the oscillator control register (OSCCON), the SCS1 and SCS0 bits select
the CPU’s clock source. In normal, full-power operation, the clock source is the
primary clock specified in CONFIG1H. For reduced power consumption, the
clock source can be the Timer1 oscillator or the internal oscillator block. When
using the internal oscillator block, the IRCF2..IRCF0 bits select the frequency.
When using the Timer1 oscillator, the frequency is determined by the clock
source connected to the T1OSI and T1OSO pins.
After changing the clock source, firmware that wants to continue using the
serial port will likely need to change the values in the SPBRG and SPBRGH
registers as described below.
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The oscillator tuning register (OSCTUNE) provides additional control of the
internal oscillator including selecting a source for the internal 31-kHz oscillator
(INTSRC), enabling a 4x frequency multiplier (PLLEN), and fine-tuning the
oscillator’s frequency (TUN4..TUN0).
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When OSCCON has configured the CPU to use the primary clock, Configu-
ration register 1 high (CONFIG1H) selects the clock’s source. FOSC3..FOSC0
set the source as a timing input on the OSC1 and OSC2 pins (in some cases
only OSC1 is used) or as the chip’s internal oscillator block.
Depending on the values of the FOSC bits, the primary clock’s frequency can
be the same as the frequency at OSC1 and OSC2 or four times that value. Set-
ting FOSC3..FOSC0 to 0001b configures the chip to use an external oscillator
for FOSC. A 10-MHz oscillator results in FOSC = 10 MHz. Setting the bits to
(^0110) b enables using slower external clocks by setting FOSC equal to the exter-
nal oscillator’s frequency multiplied by four. A 10-MHz oscillator results in
FOSC = 40 MHz.
The functions of the bits in the configuration registers vary with the chip, so
always check the data sheet for the chip you’re using.