CHAPTER 12. CONDITIONAL JUMPS CHAPTER 12. CONDITIONAL JUMPS
12.4.3 MIPS.
Unfortunately, GCC 4.4.5 for MIPS is not that good:
Listing 12.33: Optimizing GCC 4.4.5 (IDA)
my_max:
; set $v1 $a1<$a0:
slt $v1, $a1, $a0
; jump, if $a1<$a0:
beqz $v1, locret_10
; this is branch delay slot
; prepare $a1 in $v0 in case of branch triggered:
move $v0, $a1
; no branch triggered, prepare $a0 in $v0:
move $v0, $a0
locret_10:
jr $ra
or $at, $zero ; branch delay slot, NOP
; the min() function is same, but input operands in SLT instruction are swapped:
my_min:
slt $v1, $a0, $a1
beqz $v1, locret_28
move $v0, $a1
move $v0, $a0
locret_28:
jr $ra
or $at, $zero ; branch delay slot, NOP
Do not forget about thebranch delay slots: the first MOVE is executedbeforeBEQZ, the second MOVE is executed only if the
branch wasn’t taken.
12.5 Conclusion.
12.5.1 x86
Here’s the rough skeleton of a conditional jump:
Listing 12.34: x86
CMP register, register/value
Jcc true ; cc=condition code
false:
... some code to be executed if comparison result is false ...
JMP exit
true:
... some code to be executed if comparison result is true ...
exit:
12.5.2 ARM.
Listing 12.35: ARM
CMP register, register/value
Bcc true ; cc=condition code
false:
... some code to be executed if comparison result is false ...
JMP exit
true:
... some code to be executed if comparison result is true ...
exit: