Chapter 8 Advanced Topics

In this chapter, some of the more esoteric features of

VHDL are discussed. Some of the features may be useful

for certain types of designs, and not for others. Typical

usage examples are presented to show how these features

might be taken advantage of.

Some of the features discussed include overloading,

qualified expressions, user-defined attributes, generate

statements, aliases, and TextIO. All of these features pro-

vide the user with an advanced environment with which

to do modeling.

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