VHDL Programming

(C. Jardin) #1

272 Chapter Ten


SUMMARY


In this chapter, we looked at a number of different VHDL synthesis exam-
ples. They ranged from simple gate level descriptions to more complex
examples that contained state machines. In the next few chapters, we look
at a more complex example that requires a number of state machines, and
we follow the process from start to finish.
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