CHAPTER

11

High-Level

Design Flow

This chapter describes the design flow used to create com-

plex FPGA and ASIC devices. The designer starts with a

design specification, creates an RTL description, verifies

that description, synthesizes the description to gates, uses

place and route tools to implement the design in the chip,

and then verifies that the final result is correct in terms

of function and timing. The high-level design flow is

shown in Figure 11-1.

The first step in a high-level design flow is the design

specification process. This process involves specifying the

behavior expected of the final design. The designer puts

enough detail into the specification so that the design can

be built. The specification is usually written in the

designer’s native language and specifies the expected

function and behavior of the design using textual

description and graphic elements.

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