VHDL Programming

290 Chapter Twelve

Reg0

Reg1

Reg2

Reg3

Reg7

Regsel

ProgCnt

AddrReg

Addr(15:0) Data(15:0)

ALU

Control

Ready R/W VMA

Shifter

Shiftsel

Alusel

OutReg

Progsel

Addrsel

Outsel

OpReg

OpRegsel

InstrReg

Instrsel

Clock

Reset

Comp

Compsel

CompoutCompout

Figure 12-1
CPU Block Diagram.

CPU Design

The example is a small, 16-bit microprocessor. A block diagram is shown

in Figure 12-1.

The processor contains a number of basic pieces. There is a register

array of eight 16-bit registers, an ALU (Arithmetic Logic Unit), a shifter,

a program counter, an instruction register, a comparator, an address reg-

ister, and a control unit. All of these units communicate through a com-

mon, 16-bit tristate data bus.

Top-Level System Operation

The top-level design consists of the processor block and a memory block

communicating through a bidirectional databus, an address bus, and a few

control lines. The processor fetches instructions from the external memory

and executes these instructions to run a program. These instructions are