1478 Chapter 39
frequency and loop gain, operation at higher frequencies
will require either frequency division down to 48 kHz or
44.1 kHz, or a corresponding reduction of the loop gain.
The phase comparator is a frequency-phase
(zero-degree) type, and the PLL has a proportional, inte-
grating, differentiating (PID) characteristic. The propor-
tional constant Kp is 1 LSB at 163 ns time error (2.8q at
48 kHz). The integration time constant Ki is 1 LSB/s at
163 ns time error. The differential constant Kd is 1 LSB
at 163 ns/s change of time error. The differential signal
maximum gain is 8 LSB at 163 ns time error (fast
change). The master reference clock must have an accu-
racy of r50 ppm or better.
The AES3-MIC mode 2 transmitter must have a
VCXO basic accuracy of r50 ppm, a minimum tuning
range of r60 ppm + basic accuracy, a maximum tuning
range of r200 ppm, and a tuning slope that is positive
with fmax for control data = 0xFF. The control voltage
low pass filter has a dc gain of unity, a stage 1 filter that
is first order with a corner frequency of 68 mHz
(0.068 Hz) and maximum attenuation for frequencies
greater than 10 Hz of 24 dB constant, and a stage 2 filter
that is first order with a corner frequency of 12 Hz.
Means may be used to raise the corner frequencies when
the rate of tuning change is great. This will allow faster
lockup on power on.
AES42 provides schematics showing how such a
mode 2 control system might be implemented.
39.5.8 Microphone Identification and Status Flags
AES42 compliant transmitters may send status informa-
tion to the receiver using the user data bit as defined in
AES3. The channel status block start preamble is used
to identify the start of blocks of 192 bits of user data.
Each subframe contains user data. This allows different
information to be sent in each subframe that is associ-
ated with that subframe.
In monophonic microphones where the audio data is
repeated in both subframes, the user data must also be
repeated.
Microphone status data is sent in MSB form in pages
of 192 bits each. The pages are organized into 24 bytes.
Byte 0 of all pages always contains the same data,
including a page identifier, and time critical bits. This
assures the delivery of the time critical bits no matter
which page is being sent. Page 0 is sent continuously
with each additional page being sent at least once per
second. The receiver may request additional pages using
the page request command in Extended Command data
byte 4.
In order for the receiver to properly interpret the user
data, the transmitter must set byte 1 bits 4–7 of the
AES3 channel status data to 0 0 0 1. This indicates the
user data bit is in use, and it is organized into 192 bit
blocks starting with the AES3 subframe Z preamble.39.5.8.1 OrganizationAll status bytes are sent MSB first, Table 39-3.Table 39-3. Status Data PageStatus Data Page 0
Status Byte 0—Starts All Status Data Pages
Bits 0–2 Reserved.
Bit 0 1 2
State 0 0 0 Reserved. Must always be set to 0 0 0.
Bit 3 Mute
0 Not muted, default.
1 Muted.
Bit 4 Overload.
0 No overload, default.
1 Overload.
Bit 5 Limiter.
0 Limiter not active, default.
1 Limiter active.
Bits 6–7 Page Identifier.
Bit 6 7
State 0 0 Status Page 0.
1 0 Status Page 1.
0 1 Status Page 2.
1 1 Status Page 3, reserved.
Status Data Page 0 Byte 1—Microphone Configuration Echo
Bits 0–1 Low-Cut Filter Status Echo.
Bit 0 1
State 0 0 No filter, default.
1 0 Low-cut filter 1 (manufacturer defined).
0 1 Low-cut filter 2 (manufacturer defined).
1 1 Low-cut filter 3 (manufacturer defined).
Bits 2–5 Directivity Status Echo.
Bit 2 3 4 5
State 0 0 0 0 Manufacturer defined directivity, default.
1 0 0 0 Omnidirectional.
0 1 0 0 Increasing directivities
0 0 1 0 through this state.
1 0 1 0 Subcardioid.
0 1 1 0 Increasing directivities
1 1 1 0 through this state.
0 0 0 1 Cardioid.