SEMICONDUCTOR DEVICE PHYSICS AND DESIGN

(Greg DeLong) #1
INDEX 555

BJTfτ, 340
Forward-biased diode, 310
Schottky diode, 318
Excess carrier density, 255
Excess carriers, 157
Excess minority carrier concentration, 185


Fermi energy, 42
Fermi golden rule, 97
Fermi level
In equilibrium, 123
Intrinsic material, 57
Fermi level pinning, 220, 222, 362, 390
Fermi-Dirac distribution, 382
Fermi-Dirac occupancy probability, 391
Fermion, 42
Field effect transistor (FET), 356
Band diagram, 372
Depletion profile, 369
High-frequency response, 411
Voltage profile, 372
Field plate, 401
Field shaping, 401
Fixed charge, 92
fmax(Bipolar), 341
fmax,see Power gain cut-off frequency
fmax(FET), 415
Forward active mode, 319
fτ(FET), 403, 413
fτ(Bipolar), 326
Full hamiltonian, 96


GaAs, 362, 368
GaAs/AlGaAs HBTs, 347
GaN, 388
Gate capacitance, 374, 382
Gate capacitor, 385
Gate leakage, 400
Gate recess, 400
Gate resistance, 413
Gate-to-channel capacitance, 386, 413
Gate-to-drain capacitance, 413
Gate-to-source capacitance, 402, 413
Gauss’ law, 233


Generalized Moll-Ross relationship, 269, 270
Generation, 125
Generation currents, 164
Gradedp-nheterojunction, 237
Gradual channel approximation, 363
Gradual channel length, 373
Group velocity, 40
Gummel correction, 546
Gummel number, 259, 270, 282
Gummel-Poon model, 284

HBT, 247, 266
GaAs/AlGaAs, 347
InGaAs/InAlAs, 348
Si Based, 346
Heavy hole band, 47
HEMT, 375
Back-barriers, 398
Band diagram, 381, 385
Boundary conditions, 383
Charge distribution, 381
Conductivity, 396
Design issues, 395
Electric field profile, 381
Field plate, 401
Gate recess, 400
Lever rule, 384
n+cap layers, 395
Pinch-off voltage, 385
Sheet charge density, 395
T-gate, 378
Heteroepitaxy, 389
Heterojunction, 232
Abruptp-n, 232
Built-in potential, 233, 435
Current flow, 235
Depletion width, 233
Quasi-electric field, 238
Ratio of electron to hole current, 237
Heterojunction FET (HFET), 356, 362, 375
High field transport, 110
High injection, 177, 280
High-field drift region, 415
High-voltage effects, 177
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