VHDL Programming

(C. Jardin) #1
TRI apex20e 16 x 1 16 TRIs
VCC apex20e 1 x 1 1 VCC
alu work 1 x 1 1 GND
156 156 LCs
apex20_lcell_normal apex20e 33 x 1 33 LCs
comp work 1 x 26 26 LCs
control work 1 x 108 108 LCs
1 1 GND
1 1 VCC
384 384 Memory Bits

364 Chapter Fifteen


Figure 15-8
Optimize Design.

Free download pdf