VHDL Programming

(C. Jardin) #1

(^472) Index
IF statement, 47– 48
IICE, 400
IICE configuration dialog box, 407
'IMAGE, 451
Impure function, 460
IN, 133
Incomplete types, 98– 102
Incremental binding, 458– 459
Inertial delay, 20– 21
Inertial delay buffer waveforms, 21
Inertial delay model, 22
Inferred flip-flops, 257
INOUT, 133
Input slope delay, 243
'INSTANCE_NAME, 452
Instruction, 291– 293
Instruction register, 321– 322
Instruction words, 292
Instruments, 401
Intelligent In-Circuit Emulator
(IICE), 400
Intrinsic delay, 242, 243
Irregular generate statement,
222 – 224
Krol, Paul, 195


'LAST_ACTIVE, 160

'LAST_EVENT, 158– 160

'LAST_VALUE, 157– 158

Late arriving signals, 241
'LEFT, 144– 147
'LEFT(n), 154– 156
'LEFTOF, 151– 154
'LENGTH, 147– 149
'LENGTH(n), 441
Leonardo menu bar, 359
Leonardo Spectrum synthesis tool,
231, 257
Leonardo Spectrum GUI, 358
Libraries, 3
Library declaration, 438
Literals, 441, 443
Load, 240
Load instructions, 291
LoadI, 352
Loading delay, 242, 243
LOOP statement, 50– 54

'LOW, 144– 147

'LOW(n), 154– 156
Lower-level configurations, 179– 180

Mapping library entities, 183– 185
Mapping to gates, 247– 250
Model Technology ModelSim
command language, 341, 349
ModelSim simulator, 341, 349
Multidimensional arrays, 91
Multiple WAIT conditions, 63
Multiply driven signals, 27
Mux functional table, 19

NATURAL, 106

NEW, 96

NEXT statement, 53– 54
Nine-value resolution function,
123 – 128
Note category, 56

Object types, 74– 78
Open/close files, 454– 455
Operator argument type overloading,
213 – 215
Operators, 211, 442
Optimization process, 244
OTHERS clause, 49
OUT, 133
Overloading, 206– 215
operators, 210– 215
subprogram, 206– 210
Overloading subprogram argument
types, 208

Package body, 138– 141
Package declaration, 136
Packages, 135– 141
Pass through operation, 324
Passive processes, 70– 72
'PATH_NAME, 451
Physical types, 85– 86
Pla structure, 245
Place and route, 284, 369– 378
high-level design flow, 284– 286
process, 370– 372
setting up a project, 373– 377
PORT clause, 438
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