VHDL Programming

122 Chapter Five Driver Values Initial Value Z ZH Z H Resultant Value Figure 5-2 Four State Resolution with Two Values. NULL; EN ...

Subprograms and Packages 123 Driver Values Initial Value Z HZL H H X Resultant Value Figure 5-3 Four State Resolution with Three ...

124 Chapter Five Z0, Z1, ZX, R0, R1, RX, F0, F1, FX weakest-----------------------------strongest The system consists of three s ...

Subprograms and Packages 125 TYPE ninevaltab IS ARRAY(nineval’LOW TO nineval’HIGH) OF nineval; TYPE strengthtab IS ARRAY(strengt ...

126 Chapter Five implement. The basic algorithm of the function is the same as the fourval resolution function; however, the ope ...

Subprograms and Packages 127 a stronger strength value than variable resultcauses variable resultto be updated with the stronger ...

128 Chapter Five Although VHDL simulators can support any type of resolution that can be legally written in the language, synthe ...

Subprograms and Packages 129 MEMORY CPU IO_PORT DISK_CONTROL XBUS Figure 5-6 Block Diagram of Computer. END RECORD; TYPE xtypeve ...

130 Chapter Five END cresolve; END composite_res; Type xtypedeclares the record type for signal xbus. Type xtypevector is an unc ...

Subprograms and Packages 131 Let’s discuss the resolved subtype method first. To create a resolved sub- type, the designer decla ...

132 Chapter Five TYPE fourvalvector IS ARRAY(natural RANGE <>) OF fourval; FUNCTION resolve( s: fourvalvector) RETURN four ...

Subprograms and Packages 133 Procedures In the earlier section describing functions, we discussed how functions can have a numbe ...

134 Chapter Five results from the procedure. Let’s examine what the result from the pro- cedure is from the input array value sh ...

Subprograms and Packages 135 END bus_average; END intpack; A process calling the procedure might look as shown below: PROCESS( m ...

136 Chapter Five Declaring data inside of a package allows the data to be referenced by other entities; thus, the data can be sh ...

Subprograms and Packages 137 PACKAGE tpack IS CONSTANT timing_mode : t_mode; END tpack; This example shows a deferred constant c ...

138 Chapter Five actual subprogram body specified yet. The subprogram body must exist before the simulator is built, during elab ...

Subprograms and Packages 139 result := s(i); ELSE result := undriven; ASSERT FALSE REPORT “multiple drivers detected” SEVERITY E ...

140 Chapter Five result := result + 1; END IF; END LOOP; RETURN result; END vect_to_int; FUNCTION int_to_st16(s : INTEGER) RETUR ...

Subprograms and Packages 141 Functions vect_to_intand int_to_st16must be declared ahead of function addto compile correctly. All ...