Microsoft Word - Digital Logic Design v_4_6a
Algebraic equation F(A,B) = {(A’.B)’.(A.B’)’}’ Truth Table A B F(A,B) 0 0 0 0 1 1 1 0 1 1 1 0 This circuit is implementing an e ...
3.3. Designing Logic Circuits The process of combinational logic design is best described in six steps: 1) Draw the system diagr ...
Solution: 1) Draw the system diagram and Identify input and output variables.. Input and output value definition: Ki =1 when ke ...
4) Identify the logic gates required and draw the schematic to implement the terms of the algebraic function. 5) Implement (pay ...
Fan-out and Fan-in Fan-out: The number of gate inputs that can be driven by a single output (for LS chips. the fan-out limit ...
3.4. Combinational Logic Analysis and Design Below is a summary of design and analysis process steps for a combinational logic d ...
3.5. Compressing Truth Tables and K-maps The process of compressing truth tables. Truth table compression is done by: Row c ...
The concept of compressing around a variable using Shannon’s Expansion Theorem also applies to K-maps. The example below uses ...
Example of plotting, filling and reducing a compressed K-map directly from the compressed K- map and expanding to an uncompres ...
F(A,B,C,D,Y,Z) = p1 + p2 + p3 + p4 + p5 = BC.. Z+AC.. Y+BC.. Y+ABC... D+AB.. D Although you can use the compressed K-map and app ...
3.6. Glitches and Their Causes A glitch is a momentary error condition on the output caused by unequal signal paths delays in ...
Step 3. Take a look at any Function Static hazards that exist, and if they may cause a Glitch. Hint: Look for two or more input ...
Dynamic Hazards A dynamic hazard occurs when an output changes from 0 to 1 or from 1 to 0. (in static hazard case: output befo ...
3.7. Types of Functions and Delays Trivial Functions, one or zero input GND, Vcc, Buffer, and Inverter We use tp to refer to ...
Example: Given the following K-maps for F1 and F2 outputs of a three input system, find the optimum design: Commonly-used compl ...
3.8. Beyond Standard Logic: Applications Precision Timers “555” This device is a precision timer that may be configured for a ...
Example Using 555 timer, design a circuit that generates a clock signal with frequency of 2.5 Khz and 75% duty cycle. Show you ...
Encoders Function: 2n input n output Example: 74LS148 "8 to 3 encoder" Note: You can design these circuits using the 6-step ...
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Decoder, also called minterm generator Function: n input 2 n output Example: 74LS138 "3 to 8 Decoder/Demux" ...
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